What is SPI?
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SCLK: Serial Clock
MOSI: Master Out Slave In -Data from Master to Slave
MISO: Master In Slave Out -Data from Slave to Master
SS: Slave Select
- Originally developed by Motorola
- Used for connecting peripherals to each other and to microprocessors
- Shift register that serially transmits data to other SPI devices
- Actually a “3 + n” wire interface with n = number of devices
- Only one master active at a time
- Various Speed transfers (function of the system clock)
- Used for moving data simply and quickly from one device to another
- Serial Interface
- Data Exchange
SPI is a synchronous protocol that allows a master device to initiate communication with a slave device. Data is exchanged between these devices.
SPI is implemented in the PICmicro MCU by a hardware module called the Synchronous Serial Port or the Master Synchronous Serial Port.
This module is built into many different PICmicro devices. It allows serial communication between two or more devices at a high speed and is reasonably easy to implement.
- SPI is a Synchronous protocol
- The data is clocked along with a clock signal (SCK)
- The clock signal controls when data is changed and when it should be read
- Since SPI is synchronous, the clock rate can vary, unlike RS-232 style communications
SPI is a Synchronous protocol.
The clock signal is provided by the master to provide synchronization. The clock signal controls when data can change and when it is valid for reading.
Since SPI is synchronous, it has a clock pulse along with the data. RS-232 and other asynchronous protocols do not use a clock pulse, but the data must be timed very accurately.
Since SPI has a clock signal, the clock can vary without disrupting the data. The data rate will simply change along with the changes in the clock rate. This makes SPI ideal when the microcontroller is being clocked imprecisely, such as by a RC oscillator.
SPI is a Master-Slave protocol
- The Master device controls the clock (SCK)
- No data is transferred unless a clock signal is present
- All slaves are controlled by the master clock
- The slave devices may not manipulate the clock
Only the master device can control the clock line, SCK.
No data will be transferred unless the clock is manipulated.
All slaves are controlled by the clock which is manipulated by the master device.
The slaves may not manipulate the clock. The SSP configuration registers will control how a device will respond to the clock input.
SPI is a Data Exchange protocol
- As data is being clocked out, new data is clocked in
- Data is exchanged – no device can just be a transmitter only or receiver only
- the master controls the exchange by manipulating the clock line (SCK)
- Often a signal controls when a device is accessed – this is the CS or SS signal
- CS or SS signal is known as “Chip Select” or “Slave Select” and is frequently an active-low signal.
As data is being clocked out, new data is also being clocked in. When one “transmits” data, the incoming data must be read before attempting to transmit again.
If the incoming data is not read, then the data will be lost and the SPI module may become disabled as a result. Always read the data after a transfer has taken place, even if the data has no use in your application.
Data is always “exchanged” between devices. No device can just be a “transmitter” or just a “receiver” in SPI. However, each device has two data lines, one for input and one for output. These data exchanges are controlled by the clock line, SCK, which is controlled by the master device. Often a slave select signal will control when a device is accessed. This signal must be used for when more than one slave exists in a system, but can be optional when only one slave exists in the circuit. As a general rule, it should be used.
This signal is known as the SS signal and stands for “Slave Select.” It indicates to a slave that the master wishes to start an SPI data exchange between that slave device and itself. The signal is most often active low, so a low on this line will indicate the SPI is active, while a high will signal inactivity.
It is often used to improve noise immunity of the system. Its function is to reset the SPI slave so that it is ready to receive the next byte.
- Data is only output during the rising or falling edge of SCK
- Data is latched during the opposite edge of SCK
- The opposite edge is used to ensure data is valid at the time of reading
- SS slave select
This signal is known as Slave Select. When it goes low, the slave device will listen for SPI clock and data signals.
- SCK serial clock
This is the serial clock signal. It is generated by the master device and controls when data is sent and when it is read.
- SDO Serial Data Output
This signal carries the data sent out of the device
- SDI Serial Data Input
This signal carries the data sent into the device